This invention relates to a control device which can store data regarding troubles which take place during operation.
A conventional control device of this type is as shown in FIG. 1. In FIG. 1, reference numeral 1 designates a CPU (central processing unit) 1; and numerals 4, 5, 6 and 7, designate a program memory, a data memory, a process I/O (input/output) unit, and a peripheral equipment control unit, respectively. A maintenance unit 3 performs, when a problem arises in the circuits 4 through 7, inspection and maintenance. An interface unit 2 is provided between the CPU 1 and the maintenance unit 3. Trouble indication lamps 10 are provided for each unit, for instance.
In the circuitry, in FIG. 1, the occurrence of trouble is detected as follows:
The CPU 1 reads control instructions from the program memory 4, and accesses the data memory 5 and the process I/O unit 6 according to the control instructions thus read, to execute the control contents successively.
It is assumed that, in this operation, a problem arises in the program memory 4, the data memory 5, the process I/O unit 6, or the peripheral equipment control section 7 in the read or write operation of the CPU 1. If, in this case, the device where the problem has taken place is continuously used, then errors may occur in the following processes. Accordingly, it is necessary that the malfunctioning device is detected quickly, and the trouble is eliminated.
Accordingly, in the conventional system, an indicating unit such as a trouble indicating lamp 10 is provided for each of the devices, so that the detection of a problem is indicated on each device. Furthermore, when a problem is detected in the read operation of the CPU 1, an error signal is applied to the devices, to turn on the trouble indicating lamp.
Since the conventional control device is arranged as described above, it suffers from the following difficulties:
(1) In the case where problems occur at several points, it is impossible to determine which problem was firstly caused.
(2) A malfunction such that nothing responds to access from the CPU 1 cannot be indicated. (Display by the trouble indicators presumes the fact that trouble has been detected.)
(3) With respect to a bus parity error, the occurrence of the parity error can be indicated, but a more concrete indication as to the bit order of the bus cannot be made.
As is apparent from the above description, a trouble warning system in which, as shown in FIG. 1, trouble indicating lamps are provided for each of the devices, can sometimes not concretely locate the cause. Thus, the system is not adequate because problems cannot be quickly repaired or eliminated after they occur.